Indian Institute of Technology Gandhinagar (IIT Gandhinagar) has announced a recruitment drive for the position of Postdoctoral Fellow specializing in RF/Mixed-Signal Circuits for 6G Applications. This is a golden opportunity for researchers and professionals with expertise in high-frequency analog and mixed-signal integrated circuit design to contribute to cutting-edge 6G technology development. The role offers a competitive consolidated stipend and involves engaging in innovative research projects related to RF front-end design, PLLs, VCOs, and frequency synthesizers tailored for emerging 6G systems. Below is an extensive job description to guide interested candidates through the application process and provide detailed job expectations.
Job Title: Postdoctoral Fellow – RF / Mixed-Signal Circuits for 6G Applications
Organization:
Indian Institute of Technology Gandhinagar (IIT Gandhinagar)
Location:
Gandhinagar, Gujarat, India
Employment Type:
Research Fellowship (Temporary/Contractual)
Application Last Date:
30th December 2025
Official Website:
Compensation and Duration
This role offers a consolidated stipend of ₹ 72,000 per month, designed to support research activities and professional development. The initial appointment is granted for a period of one (1) year, with the possibility of extension based on performance, project requirements, and available funding.
Eligibility Criteria
| Eligibility Parameter | Details |
|---|---|
| Educational Qualification | PhD in Electrical or Electronic Engineering with mandatory experience in Analog/Mixed-Signal IC Design. |
| Academic Performance | Minimum of 60% or equivalent grade from graduation onwards; 55% or equivalent in Class 10th and 12th. |
| Research and Publication | Strong background in analog/mixed-signal/RF IC design with recognized publications in reputed journals or conferences. |
| Technical Skills | Hands-on experience with EDA tools such as Spectre, SpectreRF, ADS or equivalent. |
| Preferred Experience | Prior experience with PLL, VCO, oscillator design, high-frequency circuit design, and tapeout processes. |
| Additional Advantage | Experience in technology-circuit co-optimization for RF front-end design and working with advanced technology nodes. |
Key Responsibilities
The selected candidate will be expected to contribute to ongoing research projects focused on the design and optimization of high-frequency circuits for 6G systems. Main activities include:
- Design, simulation, and validation of Phase-Locked Loops (PLLs), Voltage-Controlled Oscillators (VCOs), and frequency synthesizers suitable for sub-THz and mmWave bands.
- Investigation of phase noise, tuning range, power consumption, and other critical parameters influencing RF front-end performance at advanced technology nodes.
- Implementation of circuit prototypes and collaboration with fabrication teams for tapeout and testing.
- Analysis and modeling of high-frequency oscillators and synthesizers to optimize their performance within 6G communication systems.
- Preparation of technical reports, publications, and documentation related to research findings.
- Participation in interdisciplinary teams focused on integrating RF front-end modules with overall system architecture.
Selection Process
The application process involves the following steps:
- Submission of applications exclusively via the official Google form (link provided below). Applications sent via email will not be accepted.
- Screening of applications based on academic background, research experience, and publications.
- Shortlisted candidates will be invited for an interview conducted online or at the institute campus as applicable.
- Final selection will be made based on the performance in the interview and recommendation by a selection committee.
Note: No application fee is required for this process.
Important Links and Application Procedure
Candidates interested in applying should use the following link to submit their application before the deadline:
For detailed information regarding the recruitment, responsibilities, and criteria, refer to the official notification available in PDF format:
Download Official Notification
Additional Resources
- Official Website: iitgn.ac.in
- Join External Communication Channels:
- Arattai Channel
- Telegram Channel
- WhatsApp Channel
- Sarkari Result Vacancy Portal: Sarkari Result Vacancy
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Frequently Asked Questions (FAQs)
1. What is the last date for application submission?
The last date to apply via the official Google form is 30th December 2025.
2. What are the essential qualifications for this position?
A PhD in Electrical/Electronic Engineering with proven experience in Analog/Mixed-Signal IC Design, along with publications and hands-on expertise with EDA tools like Spectre, SpectreRF, or ADS.
3. What is the stipend offered?
The selected candidate will receive a consolidated stipend of ₹ 72,000 per month.
4. What is the tenure of this post?
The initial appointment is for one (1) year, with the possibility of extension based on performance and funding availability.
5. Is there an age limit specified?
No, the advertisement does not specify any age restrictions.
6. What are the primary job responsibilities?
This role involves designing and simulating high-frequency RF circuits like PLLs and VCOs, analyzing phase noise and power efficiencies, and collaborating on tapeout processes for future 6G applications.
7. How can applicants apply?
Applicants should complete the online Google form link provided before the deadline. Applications through email will not be entertained.
8. Is prior experience with circuit tapeout necessary?
Yes, tapeout experience is considered advantageous, along with prior work on high-frequency circuit design.
9. How will the final selection be made?
Selection will be based on interview performance and recommendations from the selection committee.
10. Who can candidates contact for queries?
For any inquiries related to this recruitment, candidates can contact Dr. Tarun Kumar Agarwal at [email protected].
Conclusion
This recruitment at IIT Gandhinagar provides a unique platform for doctoral researchers specializing in RF and mixed-signal ICs to contribute to the forefront of 6G technology. Interested candidates are encouraged to carefully review the eligibility criteria, prepare their application, and submit it through the official Google form before the stipulated deadline. This opportunity not only offers a competitive stipend but also facilitates meaningful contributions to next-generation wireless communication systems.